How Elbrus processors are arranged and what are their features

When it comes to domestic processors, Elbrus immediately appears. A large-scale project, the history of which stretches back to the 70s, is trying to survive and even compete with Western counterparts. However, what are these processors and do they have a future?

What is Elbrus?
For those who hear about this name for the first time, we will make a short excursion. Elbrus is a line of Russian processors developed by MCST. In the 70-90s, Soviet scientists released several computers called “Elbrus”. Some of the latest models are still used in missile defense today.

After the collapse of the USSR, the developers united into the MCST team and began to develop their own processors. From 2005 to 2021, seven models were released. The most advanced is Elbrus-8SV – an eight-core processor made using 28 nm technology. In plans for 2022–2025, the company has four more models, up to Elbrus-32C.

We talked in more detail about the lineup and other features of these processors in a special article .

To begin with, the developers from MCST create processors on the author’s architecture. However, it is based on a well-known microarchitecture called VLIW (Very Long Instruction Word). Having studied its advantages and disadvantages, one can get an idea of ​​the Elbrus architecture itself.

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Modern desktop processors are built on CISC and RISC architectures (x86-64, PowerPC, SPARC, MIPS, ARM). They have many differences between themselves, but there is one thing that unites these two large groups – they use the out-of-order superscalar (OOOSS) approach .

What does it mean? The compiler analyzes the source code of the program, and then builds a general sequence of instructions. Further, the processor forms a pipeline from this chain of commands. Previously, a processor could execute only one instruction per cycle. Today, thanks to the principle of parallelization, several instructions can be executed in one clock cycle, but only if they are independent, that is, they do not use the results of each other.

A compiler is a program that translates text written in a programming language into a set of machine codes

Finding these independent instructions and generating instructions for the pipeline is done directly in the hardware.

The VLIW architecture is an alternative branch of development. The developers decided that the scheduling of instructions for the pipeline would not be done at the hardware level, but directly by the compiler, which can have access to the entire program code. Due to this, wide commands are immediately received at the processor input, which consist of a larger number of instructions in comparison with the OOOSS approach. As a result, the processor processes the so-called “very long instructions” – Very Long Instruction Word.

There are several advantages to implementing this approach:

The processor is capable of executing a larger number of instructions per cycle – up to 23 versus 7-8 for RISC / CISC processors.
The compiler is able to analyze the code more thoroughly, looking for parallelisms and optimally “packing” instructions for the pipeline.
Ability to simplify processor hardware by eliminating the need to plan and build dependencies at the hardware level.

The developers managed to put in the processor as many as 256 registers for integer and real data, 32 for global data, the remaining 224 for the procedure stack. RISC / CISC processors usually have up to 40 registers. A large number of registers allows less frequent access to memory, which saves time, since access to RAM is several times slower than performing operations on the processor itself.

Also, in the VLIW architecture, it is possible to pre-swap the code in the direction of branching and its primary processing on an additional pipeline. More efficient work with transition commands has been implemented. For example, if we need to make a jump jump on the x86 architecture, then the processor will first have to finish processing all unfinished instructions that are processed for several clock cycles, and only then start calculating the jump.

Jump – an unconditional jump command, allows you to jump to another part of the code and start executing commands from the specified address

Jump commands are some of the most voracious and in terms of “cost” are comparable to 10-20 other instructions.

Elbrus, on the other hand, is able to calculate the transition address in parallel with the execution of the main commands due to preliminary preparation.

Another feature of the Elbrus architecture is a protected execution mode, when work is guaranteed only with initialized data and inter-module protection is provided at the hardware level. This is one of the advantages that allows the use of Elbrus in the public sector. Also, the developers have implemented a binary translation system that creates a virtual machine for running applications on the x86 architecture.

As a result, the VLIW architecture within Elbrus really has unique features that make it possible to fully compete with current processor models from other brands. However, theory and practice are different things.

What is the problem with Elbrus processors
Elbrus processors in the sector of consumer personal computers are still quite a rarity, therefore testing is carried out mainly by enthusiasts.

One of the largest was conducted in 2020, comparing processors of different architectures in tests such as Dhrystone, Whetstone, LINPACK, Memspeed and others. Most of the results show that one of the latest Elbrus 8CB does not even reach the Core i7 2600 (2011) in performance.

A similar situation is observed when testing Elbrus in various programming languages. Of course, the Russian development is far from being carried out on the most perfect technical process, so it will not physically be able to compete with the latest solutions from other manufacturers. However, this is not the only point.

The first problem is the compiler. As we learned earlier, it is he who looks for dependencies and schedules wide commands for the processor queue. However, it does not always do it optimally, especially on modern software. As a result, low performance in most synthetic tests and various user tasks.

All this leads to the second problem – the need for highly qualified programmers. The better the program code is optimized, the easier it will be for the compiler to plan and look for dependencies. However, the low popularity and in many respects closedness of the Elbrus platform only repels the developers.

The results are also influenced by the need to emulate the x86 architecture to run certain programs. However, this disadvantage is partially solved by various GNU / Linux distributions that are actively used in the corporate sector.

It is worth noting that Intel also tried their hand at VLIW architecture. In 2001, they co-developed with HP and released the first Itanium processor for the server segment.

Despite the initial enthusiasm, the real state of affairs turned out to be depressing: the processors had high power consumption, high price, and also required powerful cooling. The desktop models never saw the light of day, as Intel was forced to focus on the x86 architecture after poor sales.

So does Elbrus have a future?
Thus, regarding the Elbrus processors, two camps have formed with opposite opinions.

Many enthusiasts and experts consider the VLIW architecture a dead-end development, because in the end, even though it can execute more instructions per clock, it loses to RISC / CISC architectures in performance. Added to this are the lack of software and the bad experience with Itanium processors, which have had hundreds of millions of dollars invested in their development.

The second camp considers VLIW-architecture, therefore, the Elbrus itself, as a promising development, at least in the corporate sector. The advantages of VLIW will only manifest themselves with the improvement of the compiler, and the creation of suitable software is only a matter of the popularity of the architecture itself among developers. Do not forget about the 28 nm process technology for Elbrus processors, while Intel has mastered 10 nm.

The development of Elbrus within the public sector and the military industry definitely makes sense, since security and the ability to abandon foreign analogues at any time are important here. At least, Russian engineers will have experience in development, since the latest models are produced at the Taiwanese TMSC factory. However, whether the Elbrus processors on the VLIW architecture will be able to provide sufficient performance for user systems and compete in the global market remains a controversial question.